AMD K5 Manual de usuario Pagina 12
- Pagina / 100
- Tabla de contenidos
- MARCADORES
Valorado. / 5. Basado en revisión del cliente
2
AMD-K5 Processor Data Sheet 18522F/0—Jan1997
PRELIMINARY INFORMATION
1.2 High-Performance Design
The superscalar RISC design techniques provide next-
generation performance levels and the power to run complex
32-bit operating systems and applications. The AMD-K5 pro-
cessor features a four-issue superscalar core that incorporates
dynamic branch prediction and out-of-order speculative execu-
tion. While other 5th-generation processors feature a two-issue
core, the AMD-K5 processor’s RISC core is four-issue.
1.3 Compatibility
The AMD-K5 processor’s compatibility is established using a
rigorous testing procedure that begins with software simula-
tion before the design is first committed to silicon. Throughout
the design and manufacturing process, industry-standard tools
and systems are used for compatibility testing.
Extended compatibility and qualification testing are provided
by industry-leading personal computer and chip set manufac-
turers. Testing culminates with certification from XXCAL,
Inc., an independent third-party testing lab. This combination
of differentiating features is responsible for the AMD-K5 pro-
cessor’s overall design and performance advantages.
Compatibility with the Microsoft Windows operating system
and the immense library of x86 software furthers these advan-
tages, and is the foundation of the AMD-K5 processor’s lead-
ing-edge solution.
- Data Sheet 1
- Trademarks: 2
- Contents 3
- 10.4 RESET, TCK, TRST 6
- List of Figures 7
- List of Tables 9
- 18522F/0—Jan1997 10
- PRELIMINARY INFORMATION 10
- 1 AMD-K5™ Processor Features 11
- 1.2 High-Performance Design 12
- 1.3 Compatibility 12
- Revision History 13
- 2 Block Diagram 14
- 3 Ordering Information 15
- 4 Architectural Introduction 16
- 4.3 Register Renaming 17
- 4.6 Cache Architecture 18
- 4.7 Branch Prediction 19
- 4.9 Reorder Buffer 20
- 4.10 Register File 21
- 5 CPU Identification 22
- 6 Logic Symbol Diagram 23
- 7 Signal Descriptions 24
- AMD-K5 Processor Data Sheet 35
- Table 2. Output Pins 35
- Table 3. Input/Output Pins 36
- Table 4. Test Pins 36
- Table 5. Bus Cycle Definition 36
- Table 6. Special Cycles 37
- 8 Processor Operation 38
- 8.3 Cache Protocol 41
- 8.4 Data Cache Coherency 42
- 8.5 External Bus Description 46
- 8.6 Bus Cycles 48
- 8.7 System Management Mode 61
- Table 12. SMM Save Area Map 62
- 8.8 Am486 64
- 9 Electrical Data 66
- 9.2 Absolute Maximum Ratings 67
- 9.3 Operating Ranges 67
- 10 Switching Characteristics 69
- 10.2 60-MHz Bus Operation 72
- 10.3 50-MHz Bus Operation 74
- Figure 15. Diagrams Key 78
- Figure 16. CLK Waveform 78
- Figure 21. TCK Waveform 81
- Figure 22. TRST Timing 81
- 11 Timing Diagrams 82
- Figure 39. Special Cycle 89
- Start blank 90
- 13 Physical Dimensions 94
- 15 Pin Designations (Model 0) 96
- Functional Grouping 98
Relacionado con productos y manuales para Procesadores AMD K5
(60 paginas)Initio Hardware user manuals
The list of Initio Hardware products contains 4 user manuals for 4 models. All pdf user’s guides are available for download or viewing online.
Comentarios a estos manuales